• Vita 42.3 XMC Compliant
• AMD Zynq UltraScale+ RFSOC Gen3
• ZU43DR/ZU47DR/ZU48DR FFVE-1156 Package
• Up to 8GB DDR4-2400 64-bit PS memory with 8-bit ECC
• Up to 4GB DDR4-2400 32-bit PL memory
• eMMC 64GB (V4.51), MRAM 512KB
• Up to PCIe x8 Gen1/2/3/4 on XMC-P5
• 4x GTY on XMC-P6 (muxed with XMC-P5)
• 1x Display Port 1.2 Video Out on XMC-P6
• 1x ETH 1000Base-T on XMC-P4
• 2x USB 3.0/2.0, 2x USB 2.0, 1x SATA 3.1 on XMC-P6
• 1x DisplayPort 1.2 on XMC-P6
• 4x RS.232/422/485 and GPIO on XMC-P4
• Up to 20x Front Panel RF IO
• Board Management Controller ARM Cortex-M3 based
• Air Cooled and Conduction Cooled

PanaTeQ’s XMC-RFSOC-A is a XMC module based on the Zynq UltraScale+ RFSoC Gen3 device from AMD.

The Zynq® UltraScale+™ RFSoC family integrates key subsystems for multiband, multi-mode cellular radios and cable infrastructure (DOCSIS) into an SoC platform that contains a feature-rich 64-bit quad-core ARM® Cortex™-A53 and    dual-core ARM Cortex-R5 based processing system.

Combining the processing system with UltraScale™ architecture programmable logic and RF-ADCs, RF-DACs, and soft-decision FECs, the Zynq UltraScale+ RFSoC family is capable of implementing a complete software-defined radio including direct RF sampling data converters, enabling CPRI™ and gigabit Ethernet-to-RF on a single, highly programmable SoC.

Zynq UltraScale+ RFSoCs integrate up to 8 channels of RF-ADCs and RF-DACs. The RF-ADCs can sample input frequencies up to 6GHz at 5GSPS with excellent noise spectral density. The RF-DACs generate output carrier frequencies up to 6GHz using the 2nd Nyquist zone with excellent noise spectral density at an update rate of 10.554GSPS

The RF data converters also include power efficient digital down converters (DDCs) and digital up converters (DUCs) that include programmable inter polation and decimation, NCO, and complex mixer. The DDCs and DUCs can also support dual-band operation. The soft-decision FEC (SD-FEC) is a highly flexible forward error correction engine capable of operating in Turbo decoding mode for wireless applications such as LTE and LDPC encode decode mode used in 5G wireless, backhaul, and DOCSIS 3.1 cable modems.

The board can be ordered with different versions of the Zynq UltraScale+ RFSoC family of devices, coupled up to 8GB 64-bit DDR4-2400 Processing Memory with 8-bit ECC.

Up to 4GB 32-bit of DDR4-2400 is also available as the Programmable Logic Memory, allowing data streaming signal processing applications. 256GB of soldered eMMC managed NAND Flash is available for local data storage.

Frond-end Analog I/O  interfaces are available using on-board RF connectors.

The board can act as a PrPMC in the system.

A large number of the Zynq Ultrascale+ RFSOC PS peripherals are available on the XMC connectors: ETH 1000Base-T, USB 3.0/2.0 , SATA 3.1, RS-232/422/485, DisplayPort 1.2, GPIOs.

PanaTeQ’s XMC-RFSOC-A-PSDK-A is also available for developpers

• 3U VITA 46.0 46.4 46.6 46.11 48.1 48.2 65.0 Compliant
• SOSA aligned, VITA 67.3D VITA 66.4

AMD Zynq UltraScale+ RFSoC Gen3

• ZU47/48DR FFVG1517 Package
• Quad-Core Cortex-A53 up to 1.3GHz
• Dual-Core Cortex-R5F up to 533MHz
• 4/8GB DDR4-2400 64-bit PS memory with 8-bit ECC
• eMMC 128GB, MRAM 512KB
• 4/8GB DDR4-2400 64-bit PL memory

Integrated RF Data Converter Subsystem

• 8x 14-bit 5GS/s ADCs, 8x 14-bit 10 GS/s DACs
• Optional Front RF SSMC Connectors
• Optional Rear RF VITA 67.3D NanoRF Connectors
• 2x GTYx4 (FPA & FPB) on VPX
• 2x ETH 1000Base-BX on VPX Control Plane
• 1x ETH 1000Base-T on VPX
• LVCMOS or 10x LVDS GPIO on VPX
• 1x USB 3.0, 2x RS.232/422/485, LVCMOS GPIO on VPX
• Board Management Controller ARM Cortex-M3 based
• Smart Power Management technology
• Board Management Controller SmartFusion based
• VPX System Controller
• Air Cooled and Conduction Cooled

PanaTeQ’s VPX3-RFSOC-B is a 3U VPX module based on the Zynq UltraScale+ RFSoC Gen3 device from Xilinx.

The board is build around ZU47/48DR RFSOC with Front Analog I/O and Rear Analog I/O (8x ADC, 8x DAC, 2x REFCLKIN, 2x TRIGGER)

The board design is SOSA Aligned.

The Zynq® UltraScale+™ RFSoC family integrates key subsystems for multiband, multi-mode cellular radios and cable infrastructure (DOCSIS) into an SoC platform that contains a feature-rich 64-bit quad-core ARM® Cortex™-A53 and    dual-core ARM Cortex-R5F based processing system.

Combining the processing system with UltraScale™ architecture programmable logic and RF-ADCs, RF-DACs, and soft-decision FECs, the Zynq UltraScale+ RFSoC family is capable of implementing a complete software-defined radio including direct RF sampling data converters, enabling CPRI™ and gigabit Ethernet-to-RF on a single, highly programmable SoC.

Zynq UltraScale+ RFSoCs integrate up to 8 channels of RF-ADCs and RF-DACs. The RF-ADCs can sample input frequencies up to 6GHz at 5GSPS with excellent noise spectral density. The RF-DACs generate output carrier frequencies up to 6GHz using the 2nd Nyquist zone with excellent noise spectral density at an update rate of 10.554GSPS.

The RF data converters also include power efficient digital down converters (DDCs) and digital up converters (DUCs) that include programmable interpolation and decimation, NCO, and complex mixer. The DDCs and DUCs can also support dual-band operation. The soft-decision FEC (SD-FEC) is a highly flexible forward error correction engine capable of operating in Turbo decoding mode for wireless applications such as LTE and LDPC encode/decode mode used in 5G wireless, backhaul, and DOCSIS 3.1 cable modems.

The board can be ordered with different versions of the Zynq UltraScale+ RFSoC family of devices, coupled up to 8GB 64-bit DDR4-2400 Processing Memory with 8-bit ECC.

Up to 8GB 64-bit of DDR4-2400 is also available as the Programmable Logic Memory, allowing data streaming signal processing applications. 64GB of soldered eMMC managed NAND Flash is available for local data storage.

Frond-end and Rear Analog I/O  interfaces are available using on-board SSMC or VITA 67.3 NanoRF connectors depending of the models.

PanaTeQ offers the VPX3-RFSOC-B-PSDK-B System Development Kit. Please contact us for more details.

• 3U VITA 46.0 46.4 46.6 46.11 48.1 48.2 65.0 Compliant
• OpenVPX aligned, VITA 67.3D
• AMD Zynq UltraScale+ RFSoC Gen3
• ZU43DR FFVE1156 Package
• Quad-Core Cortex-A53 up to 1.3GHz
• Dual-Core Cortex-R5F up to 533MHz
• 4/8GB DDR4-2400 64-bit PS memory with 8-bit ECC
• eMMC 128GB, MRAM 512KB
• 2/4GB DDR4-2400 32-bit PL memory
• Integrated RF Data Converter Subsystem
• 4x 14-bit 5GS/s ADCs, 4x 14-bit 10 GS/s DACs
• Optional Front RF SSMC Connectors
• Optional Rear RF VITA 67.3D NanoRF Connectors
• 2x GTYx4 (FPA & FPB) on VPX
• 2x ETH 1000Base-BX on VPX Control Plane
• 2x ETH 1000Base-T on VPX
• 4x USB 2.0, 4x RS.232/485, 20x LVCMOS or 10x LVDS GPIO on VPX
• Board Management Controller ARM Cortex-M3 based
• Smart Power Management technology
• Board Management Controller SmartFusion based
• VPX System Controller
• Air Cooled and Conduction Cooled

PanaTeQ’s VPX3-RFSOC is a 3U VPX module based on the Zynq UltraScale+ RFSoC Gen3 device from Xilinx.

The board is build around a ZU43DR RFSOC with Front and Rear Analog I/O (4x ADC, 4x DAC, 1x REFCLKIN, 1x TRIGGER)

The Zynq® UltraScale+™ RFSoC family integrates key subsystems for multiband, multi-mode cellular radios and cable infrastructure (DOCSIS) into an SoC platform that contains a feature-rich 64-bit quad-core ARM® Cortex™-A53 and    dual-core ARM Cortex-R5F based processing system.

Combining the processing system with UltraScale™ architecture programmable logic and RF-ADCs, RF-DACs, and soft-decision FECs, the Zynq UltraScale+ RFSoC family is capable of implementing a complete software-defined radio including direct RF sampling data converters, enabling CPRI™ and gigabit Ethernet-to-RF on a single, highly programmable SoC.

Zynq UltraScale+ RFSoCs integrate up to 8 channels of RF-ADCs and RF-DACs. The RF-ADCs can sample input frequencies up to 6GHz at 5GSPS with excellent noise spectral density. The RF-DACs generate output carrier frequencies up to 6GHz using the 2nd Nyquist zone with excellent noise spectral density at an update rate of 10.554GSPS.

The RF data converters also include power efficient digital down converters (DDCs) and digital up converters (DUCs) that include programmable interpolation and decimation, NCO, and complex mixer. The DDCs and DUCs can also support dual-band operation. The soft-decision FEC (SD-FEC) is a highly flexible forward error correction engine capable of operating in Turbo decoding mode for wireless applications such as LTE and LDPC encode/decode mode used in 5G wireless, backhaul, and DOCSIS 3.1 cable modems.

The board can be ordered with different versions of the Zynq UltraScale+ RFSoC family of devices, coupled up to 8GB 64-bit DDR4-2400 Processing Memory with 8-bit ECC.

Up to 2/4GB 32/64-bit of DDR4-2400 is also available as the Programmable Logic Memory, allowing data streaming signal processing applications. 256GB of soldered eMMC managed NAND Flash is available for local data storage.

Frond-end and Rear Analog I/O  interfaces are available using on-board SSMC or VITA 67.3 NanoRF connectors depending of the models.

A large number of the Zynq Ultrascale+ RFSOC PS peripherals are available on the VPX backplane: ETH 1000Base-T, USB 2.0, RS-232/422/485, GPIOs.

PanaTeQ offers the VPX3-RFSOC-A-PSDK-A System Development Kit.