VPX3-VERSA2

3U VITA 46.0, 46.4, 46.6, 65.0 Compliant
• Optional SOSA Aligned version VPX3VPX3-VERSA2S
• Based on AMD Versal Prime Gen1 Series
• VM1502/VM1802 VFVC1760 Package
• Dual Core Arm A72 up to 1.7 GHz
• Dual Core Arm R5F up to 750 MHz
• DSP Engines up to 1968
• 4GB or 8GB DDR4 DDR4-3200 64 64-bit PS memory with 8 8-bit ECC
• 4GB LPDDR4 LPDDR4-2133 32 32-bit PL memory
• 512MB (2x 2Gb) QSPI NOR, eMMC 256GB, MRAM 512KB
• Flash-memory-based trusted platform module (TPM 2.0) connected
to PS PS-SPI
• 12x GTY on VPX VPX-P1 Data Plane, PCIe up to Gen4 support
• 2x GTY for 1000BASE 1000BASE-X/SGMII on VPX VPX-P1 Control Plane
• 16x GPIOs on VPX VPX-P2A
• 1x ETH 1000Base 1000Base-T on VPX VPX-P2A
• 4x RS232 or 2x Full Full-Duplex RS422 on VPX VPX-P2A
• 1x USB 2.0 on VPX VPX-P1
• FMC+ VITA 57.4 site VAdj = 1.8V with 24x GTY + 38x differential I/O
pairs
• PanXIO PanaTeQ eXtensible I/O Architecture
• Programmable FMC+ and VPX I/O interface based on AMD Artix
UltraScale+ FPGA
• Optional VITA 66.5 Full-Duplex Optical Interfaces for 40Gb (4x 10Gbps) or 100Gb (4x 25Gbps) with 10 nanoRF VITA67.3
• Smart Power Management using DC/DC with PMBus
• Board Management Controller ARM Cortex Cortex-M3 based
• VPX System and IPMI controllers
• Air Cooled and Conduction Cooled
• KVPX Connectors in option

PanaTeQ
s VPX3VPX3-VERSA2 is a 3U OpenVPX module based on the AMD Versal
Prime Series adaptive SoC , supporting the VM1502 and VM1802 devices in the
VFVC1760 package.
The Versal Prime device integrates a Dual
Dual-Core Arm Cortex Cortex-A72 Application Pro-
cessing Unit (APU), a Dual Dual-Core Arm Cortex Cortex-R5F Real Real-Time Processing Unit (RPU),
DSP Engines and a large Programmable Logic fabric in a single device. It also pro-
vides high high-speed serial transceivers, integrated PCIe and Ethernet resources, on on-chip memories and a wide range of peripheral interfaces.
The VPX3
VPX3-VERSA2 can be configured with 4GB or 8GB of 64 64-bit DDR4 DDR4-3200 Pro-
cessing System memory with 8 8-bit ECC . An additional 4GB 32 32-bit LPDDR4 LPDDR4-2133
memory is connected to the Programmable Logic, providing high high-bandwidth
local memory for signal processing, data acquisition and streaming applications.
A 256GB soldered eMMC device provides local non non-volatile mass storage.
For front
front-end I/O, an on on-board VITA 57.4 FMC+ site provides a flexible interface
for a wide range of mezzanine cards used in Electronic Warfare, Software De-
fined Radio, high high-speed communications, RADAR, SONAR, LIDAR, video and sig-
nalnal-processing applications.
The VPX3
VPX3-VERSA2 introduces PanXIOPanXIO— PanaTeQ eXtensible I/O Architecture ,
a programmable I/O layer based on an AMD Artix UltraScale+ FPGA. PanXIO pro-
vides flexible connectivity and electrical adaptation between the FMC+ parallel
I/O, VPX backplane GPIOs and the AMD Versal Prime device
The FMC+ high
high-speed serial architecture remains optimized for maximum perfor-
mance, with 24 GTY transceiver lanes directly connected between the FMC+
site and the Versal Prime device , independently from PanXIO.
The board features advanced digitally controlled power converters with PMBus
interfaces together with PanaTeQ s Smart Power Management architecture and
an independent Board Management Controller for power sequencing, monitor-
ing, diagnostics and system management.
The VPX3
VPX3-VERSA2 can operate as a Single Board Computer and VPX System
Controller , eliminating the need for an additional SBC in many systems and
proving overall Size, Weight, Power and Cost (SWaP SWaP-C).
A large number of peripheral interfaces are available through the VPX backplane,
including Gigabit Ethernet, USB 2.0, RS RS-232/422, GPIOs and CAN CAN-FD.
The air
air-cooled VPX3VPX3-VERSA2VERSA2-PSDK System Development Kit is available for
software and FPGA developers and includes the VPX3 VPX3-VERSA2 module, RTM RTM-VERSA2, laboratory VPX chassis, BSP, FPGA reference designs and required ca-
bles.